US Patent: 4,331,893
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| Boolean Logic Processor Without Accumulator Output Feedback
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Patentee:
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| John P. Conners (exact or similar names) - Fond Du Lac, Fond Du Lac County, WI |
| Manufacturer: |
| Not known to have been produced |
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Patent Dates:
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| Applied: |
Nov. 28, 1979 |
| Granted: |
May 25, 1982 |
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Joel Havens
"Vintage Machinery" entry for Giddings & Lewis Manufacturing Co.
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Description: |
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This application is a division of U.S. application (now U.S. Pat. No. 4,212,076) filed 24 Sept., 1976 under and with benefit of 35 U.S.C. 120, 121. That parent application and issued patent will hereinafter be called "the Parent Case". The drawings and specification of the Parent Case are here incorporated by reference to provide background of or essential material for the invention and to illustrate one environment in which the invention here claimed finds advantageous use.
Abstract:
A clocked digital Boolean processor which responds to operation code signals and to successive single bit input (operand) signals to drive a single bit accumulator to output the successive answers of chained Boolean operations. The hardware elements are configured such that no feedback of the accumulator output (the previous answer) is required because the logic circuits determine the setting or resetting of the accumulator regardless of what the previous answer was and yet such that the new answer represents the result of a LOAD, AND, OR or EX-OR operation performed as if the input operand and the previous answer were taken as two operands. |
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